Zhang, Zhiyong is a Tenure Track Professor in the School of Electronics. He received the B.S. degrees in electronics engineering from Nankai University, Tianjin, in 1999 and the Ph.D. degree in Institute of Physics, Chinese Academy of Sciences, in 2006. His research interests are carbon-based nanoelectronics, especially including high-performance carbon nanotube-based field-effect transistors and integrated circuits, and novel devices based on carbon nanotube or graphene.

More than 150 journal papers have been published and then recorded by SCI with 6,000 citations by others, with H-factor of 43. Six of these papers are selected as Thompson ESI Highly Cited Papersof related fields (top 1%). He also holds 15 patents, including three US patents. Part of his works was awarded as the second prize in China's State Natural Science Award at 2016 (2/5), and was also awarded as Ministry of Education national sciences first award (2/8) at 2013. His works were cited by International Technology Roadmap of Semiconductor (ITRS) with 13 times in Emerging Research Materials and Emerging Research Devices, and were highlighted by Nature as a research focus. One of his jobs was chosen as ‘Ten Advances in Science of China’ in 2011.

Prof. Zhang has more than ten research projects including NSFC, 973 programs, etc. His research achievements are summarized as follows:

1) Ideal n-type ohmic contact to CNT and ballistic field-effect transistor.

2) Realization of high quality ohmic contact on semiconducting material is the key issue for fabricating high-performance devices. He found Sc or Y can form perfect ohmic contact to CNT. The n-type CNT transistors with performance near to theoretical limit were realized at the first time, and were evaluated as the best CNT transistor by International Technology Roadmap for Semiconductor (ITRS).

3) Doping free fabrication of CNT CMOS devices and integrated circuits (ICs).

4) He has proposed a method to inject electrons or holes into CNT through selecting suitable contact electrodes, and then control the polarity of CNT FETs. Based on this doping free technology we have fabricated high performance CNT CMOS transistors with perfect symmetric n- and p-FETs at the first time. In addition, transfer-transistor-logic (PTL) circuit style, which presents much higher efficiency than CMOS logic style, was introduced to design CNT ICs, and all logic units for constructing nano CPU have been fabricated with low supply voltage down to 0.4 V.

5) Scaling carbon nanotube complementary transistors to 5-nm gate lengths.

6) High-performance top-gated carbon nanotube field-effect transistors with a gate length of 5 nanometers (nm) were fabricated that perform better than silicon complementary metal-oxide-semiconductor (CMOS) FETs at the same scale. A scaling trend study revealed that the scaled CNT-based devices, which use graphene contacts, can operate much faster and at much lower supply voltage (0.4 V vs. 0.7 Volts) and with much smaller subthreshold slope (typically 73 millivolts per decade). The 5-nm CNT FETs approached the quantum limit of FETs by using only one electron per switching operation. This work was published on Science (Science 355, 271-276, 2017).